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Reality Engine

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Ordering must be observed. 14. The UNIVERSITY of NORTH CAROLINA at CHAPEL HILL ... RE stole memory cycles to refresh display. Commodity parts lowered coast of RE. 20 ... – PowerPoint PPT presentation

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Title: Reality Engine


1
Reality Engine
  • Anselmo Lastra
  • COMP290-052

2
Project Teams
  • Reports through semester
  • First overall design presentation/discussion
  • Then detailed designs/progress reports

3
Reality Engine
  • First OpenGL machine
  • Change from proprietary IrisGL
  • Fastest commercial machine of time
  • Generations
  • Akeleys definitions
  • Begins at flat-shaded polygons

4
Goals
  • ½ million textured tris/sec
  • Mip-mapped textures
  • Antialising
  • w/o sorting
  • High fill rate
  • Work as well as VGX on 2nd gen work

5
Three types of Boards
  • Geometry board
  • 6, 8, 12 geometry processors
  • Raster memory board
  • 1, 2, 4 boards to increase fill rate
  • Or antialiasing
  • Display/video generator

6
Command Processor
  • Controls work sent to geometry engines
  • Broadcasts some state info
  • Send some to particular GE
  • Round-robin assignment
  • Static load balancing
  • Sizes of primitives (t-strips) sent to GEs
    important
  • Primitive ordering

7
Geometry Engines
  • Intel i860
  • RISC, pipelined FP
  • All polygons converted to tris
  • Single precision computation
  • Typical

8
Fragment Generators
  • Custom ASICs
  • Each a portion of framebuffer
  • Interleaved
  • Talk about fragment generation later

9
Subpixel mask
  • Fixed 8x8 grid
  • Select 4, 8, or 16 samples on grid
  • Computer coverage of samples
  • Only one depth and texture coord chosen
  • Depths expanded later from dX, dY
  • Color at center also

10
Texturing
  • Texture replicated at each fragment processor
  • 5-20 times
  • Eight DRAM chips
  • One for each mipmap sample

11
Image Engine
  • 16 per fragment generator
  • One DRAM each
  • Each computes depth at subpixel covered by
    fragment
  • Bits/pixel depends on of boards and display
    resolution
  • 12 bits / color component

12
Display Board
  • Display color computed by image engines every
    fragment
  • OpenGL has no explicit end-of-frame
  • 50MHz single bit paths to board from each image
    engine
  • Color maps, etc.

13
Antialiasing
  • Alpha
  • Coverage on 8x8 grid computed
  • Ordering must be observed

14
Multisample antialiasing
  • Point sampling
  • Including accurate edges
  • Area sampling
  • Can produce artifacts
  • Screen-door transparency
  • Alpha to coverage

15
Texturing
  • Default is 16-bits / texel
  • Because of bandwidth issues
  • Can increase to 32 or 48 bits

16
Clipping
  • Point out that MIMD better for clipping
  • SIMD must execute wasted cycles to compute both
    if and else
  • Also less clipping because rasterizers scissor
    the primitives

17
Antialiasing
  • Single pass
  • Multisample
  • vs. A-Buffer

18
Triangle Bus
  • Argues that doing sort before fragment engines
    better than after
  • Compares to ES
  • Notes PixelFlow frame latency

19
Commodity DRAM
  • Many other machines used specialized video RAM
  • RE stole memory cycles to refresh display
  • Commodity parts lowered coast of RE

20
Next Time
  • Graphics pipeline
  • Read
  • Mark Segal and Kurt Akeley, The design of the
    OpenGL graphics interface

21
Homework
  • Compute bandwidths (at dots) required to render a
    million 50-pixel triangles
  • Make reasonable assumptions, such as all visible
    (or think about z-buffering)
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