Phase Delay in MAC-based Analog Functional Testing in Mixed-Signal Systems

1
Phase Delay in MAC-based Analog Functional
Testing in Mixed-Signal Systems

• Jie Qin, Charles Stroud, and Foster Dai
• Dept. of Electrical and Computer Engineering
• 200 Broun Hall, Auburn University, AL 36849-5201
• emails qinjie1/strouce/daifa01_at_auburn.edu

2
Outline

• Motivation and Background
• Built-In Self-Test Architecture
• Phase Delay in the MAC-based ORA
• Experimental Results
• Conclusions

3
Motivation and Background

• Why mixed-signal BIST?
• The increasing cost of functionality test based
  on the traditional methodology of external test
  equipment for modern mixed-signal ICs.
• The increasing difficulty to perform test on
  these ICs.
• With a rapidly increasing level of integration,
  the number of input/output (IO) pins does not
  increase accordingly.
• The operational frequency of latest analog ICs at
  GHz requires tester electronics very close to the
  DUT.

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Motivation and Background (cont.)

• What should a mixed-signal BIST be?
• It can extract the frequency spectrum information
  of the signal coming from the DUT.
• Linearity Measurement
• Frequency Response
• Signal-to-Noise Ratio Measurement
• It should be implemented using simple circuitry
  with small area penalty and should not cause
  performance penalty to analog circuitry.
• The conventional way to obtain the frequency
  spectrum is FFT. However, the area penalty and
  power consumption introduced by a FFT processor
  is not what a BIST expects.

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Motivation and Background (cont.)

• The BIST approach based on the DDS-based TPG and
  MAC-based ORA was proposed.
• DDS-based TPG can generate various waveforms
  which is required for the linearity, frequency
  response, and SNR measurement.
• MAC-based ORA could be realized in a much
  simpler, cheaper and more flexible circuit,
  compared with the FFT-based ORA.

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Built-In Self-Test Architecture
Amp
DAC
Test Controller
DUT
MUX3
Sin(2?f1nTclk?1)
f1, ?1
NCO1
ADC
MUX1
Sin(2?f2nTclk?2)
f2, ?2
NCO2
MUX4
Output Response Analyzer (ORA)
f(nTclk)
Test Pattern Generator (TPG)
f1(nTclk)
DC1
MUL1
MUX2
Accm1
f2(nTclk)
f3, ?3
Sin(2?f3nTclk?3)
DC2
MUL2
NCO3
Accm2

• Most of the BIST circuitry resides in the digital
  portion of the mixed-signal system. In such a
  way, the performance penalty are minimized.
• The number and location of the MUX inserted to
  the system determines the accuracy of the analog
  functional measurements.

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MAC-based ORA

• While performing the analog functional testing,
  the DC1 and DC2 accumulator values can be
  described as

• Then the the signal f(nTclk)s Fourier Transform
  F(?) can be expressed through DC1 and DC2

• The magnitude response A(?) and the phase delay
  ?F(?) are the two parameters widely used much
  more widely in functional measurements of analog
  circuits.

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Phase Delay in MAC-based ORA

• How can the phase delay be evaluated?

• For an on-chip test, we dont have to set up a
  full-length arctan look-up table (LUT) to
  calculate ?F(?).
• First the absolute phase offset ?Fo(?) need to be
  calculated according to the following formula

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Phase Delay in MAC-based ORA (cont.)

• Then the phase delay can be determined through
  the absolute phase offset ?Fo(?) according to the
  following table

DC1 DC2 DC1 DC2
DC1gt0 DC2gt0 Df(w) Dfo(w) Df(w) 90?-Dfo(w)
DC1gt0 DC2lt0 Df(w) 360?-Dfo(w) Df(w) 270?Dfo(w)
DC1lt0 DC2gt0 Df(w) 180?-Dfo(w) Df(w) 90?Dfo(w)
DC1lt0 DC2lt0 Df(w) 180?Dfo(w) Df(w) 270?-Dfo(w)

• The arctan look-up table (LUT) can be decreased
  by half because the value range of ?Fo(?) varies
  from 0? to 45?. when DC2/DC1 is very small, the
  arctan(DC2/DC1) can be represented by the ratio
  of the DC2/DC1. So the length of the arctan
  look-up table (LUT) can be compressed further.

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Phase Delay in MAC-based ORA (cont.)

• Once the phase delay is identified, the magnitude
  response A(?) can be calculated through the
  following approaches.
• Approach 1

• Approach 2

• Approach 3

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Phase Delay in MAC-based ORA (cont.)

• Pros and cons of the three approaches

Approach 1 2 3
Hardware overhead low high high
speed low high high
constraints It cannot be used for SNR Measurement. no no
propagation error yes yes no
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Experimental Results I

• The phase delay introduced by the digital portion
  of the BIST circuitry.

phase error due to the delay in TPG
phase error with delay removed
13
Experimental Results II

• The phase delay introduced by the ADC/DAC pair

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Experimental Result III

• The resources used by the MAC-based ORA.

of input bits, N of input bits, N of input bits, N
8 12 16
of output bits, M 28 74 129 -
of output bits, M 32 76 131 204
of output bits, M 36 78 133 206
of output bits, M 40 80 135 208
of output bits, M 44 82 137 210
of input bits, N of input bits, N of input bits, N
8 12 16
of output bits, M 28 139 244 -
of output bits, M 32 143 248 387
of output bits, M 36 147 252 391
of output bits, M 40 151 256 395
of output bits, M 44 155 260 399
Number of slices vs. MAC configuration
Number of LUTs vs. MAC configuration
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Experimental Result IV

• The resources used by a FFT-processor

Type of slices of 18?18-bit multipliers transform frequency
Pipelined 2633 12 641 kHz
Burst I/O 2743 9 313 kHz
Minimum Resources 1412 3 133 kHz
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Comparison of the MAC-based ORA and FFT-based ORA

• MAC-based ORA is much simpler and cheaper.
• MAC-based ORA is more flexible.
• the frequency resolution can be easily tuned with
  the step size of the sweeping frequency
• it can measure the interested spectrum
  information at several frequency points or in a
  narrow bandwidth easily.

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Conclusion

• phase delay is very important to the
  implementation and accuracy of the MAC-based ORA.
  
• In comparison with the FFT-based approach, the
  MAC-based ORA can be realized using much more
  flexible and simpler BIST circuitry with less
  area penalty, which is what an ideal BIST scheme
  is supposed to be.