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MPI and Multicore: Random Ramblings

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Will there be better hardware offload for messaging? ... NIC offload makes this pretty easy, of course. Software approaches have cache collision problems ... – PowerPoint PPT presentation

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Title: MPI and Multicore: Random Ramblings


1
MPI and MulticoreRandom Ramblings
  • Brian Barrett
  • Scalable Computer Architectures
  • Sandia National Laboratories
  • June 4, 2008

Sandia is a multiprogram laboratory operated by
Sandia Corporation, a Lockheed Martin
Company,for the United States Department of
Energys National Nuclear Security
Administration under contract DE-AC04-94AL85000.
2
Development Model
Mary Shaw, Prospects for an Engineering
Discipline of Software, Carnegie Mellon,1990
3
Why MPI worked
NX Shmem P4, PVM Sockets
Distributed Memory Hardware
Message passing woks
Legacy MPI codes
MPICH LAM/MPI Open MPI
MPI
Mary Shaw, Prospects for an Engineering
Discipline of Software, Carnegie Mellon,1990
4
Multicore Panic
MPI OpenMP HPCS PGAS
Multicore Architctures
???
???
???
???
Mary Shaw, Prospects for an Engineering
Discipline of Software, Carnegie Mellon,1990
5
What is MPI?
  • MPI is an interface, not an implementation
  • Implementations have different goals
  • research, stability, performance, portability
  • TCP, InfiniBand, or Portals
  • Threads / independent progress or lowest latency
  • Latency vs. zero copy eager
  • MPI implementations do adapt and change
  • SMP optimizations
  • RDMA interfaces
  • But what are we adapting to?

6
Multicore MPI
  • MPIs path forward dependent on hardware trends
  • Yes, we know multicore is coming, but...
  • Will caches be coherent?
  • Will it have hardware multithreading?
  • Will it have lightweight synchronization
    primitives?
  • Will it have homogeneous cores?
  • Will there be better hardware offload for
    messaging?
  • HPC will have little influence over the answers
    to these questions
  • The answers will influence MPI implementations

7
Multicore MPI
  • MPI point-to-point performance limited by
    matching costs
  • NIC offload makes this pretty easy, of course
  • Software approaches have cache collision problems
  • Threading limited cache coherency?
  • MPI Threads pushes towards multi-threaded MPI
  • Currently quite expensive (locks in critical
    path)
  • Lightweight synchronization limits cost
  • Independent progress finally arrive?
  • Needs hardware support or threads

8
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