Load-Pull%20Based%20Design

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Load-Pull Based Design of Ultra-Linear W-CDMA
Base-Station Power Amplifiers
Srdjan Pajic and Zoya Popovic Department of
Electrical and Computer Engineering University of
Colorado, Boulder William McCalpin dBm
Engineering, Boulder, CO, USA
Funded by dBm Eng. WPAFB DARPA IRFFE
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Overview

• Motivation for load-pull based PA design
• Description of method for linearity design
• (2GHz, 60W LDMOS, -45dBc ACPR)
• Resulting PA characterization
• Discussion other PAs designed using load-pull
• (high-efficiency with
  dynamic biasing etc.)

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Usual Approach to PA Design
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Load-pull Based PA Design, Systemathic Approach
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Design Example WCDMA Base-Station PA
Commercial load-pull system (Focus Microwaves)

• Experimental (uncharacterized) device
• LDMOS, 42-finger, internally matched to 3?
• VDDMAX 66V, IDDMAX 11 A (DC pulsed testing)
• Frequency range 2.11GHz 2.17GHz
• Expected CW output power 70W
• Expected power gain 12 dB
• Recommended drain voltage 28V

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Design Example WCDMA Base-Station PA
ACPR - 45 dBc 3GPP Test Model 1, 16 DPCH, 10dB
peak/av., 0.01 CCDF
Source-Pull
Load-Pull
ZS (8.5 j0) ? f 2.11 GHz
ZL (1.5 j3.25) ?
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Design Example WCDMA Base-Station PA
ACPR - 45 dBc 3GPP Test Model 1, 16 DPCH, 10dB
peak/av., 0.01 CCDF
Source-Pull
Load-Pull
ZS (7 j0) ? f 2.17 GHz
ZL (1.5 j3.0) ?
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Design Example WCDMA Base-Station PA
PA matching and biasing network microstrip
substrate h 0.787 mm, ?R 2.5
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Design Example WCDMA Base-Station PA

• Parameter variations
• microstrip line dimension width 100 ?m
• capacitor tolerance 5
• ?? ZL variation
• Re ZL (1.3 ? 1.6) ?
• Im ZL -(2.6 ? 3.3) ?

Expected performance variation Output power _at_
ACPR lt -45 dBc 0.5 dB Power gain _at_ ACPR lt -45
dBc 0.75 dB
Yield analysis of the output matching network
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Design Example WCDMA Base-Station PA
Output PA circuit half
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Design Example WCDMA Base-Station PA
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Design Example WCDMA Base-Station PA
f 2.17 GHz
f 2.11 GHz
Measured power-sweep parameters of the PA
designed using this method
Load-pull, ACPR -45 dBc Load-pull, ACPR -45 dBc Final PA , ACPR -45 dBc Final PA , ACPR -45 dBc
f GHz Pout dBm Gain dB Pout dBm Gain dB
2.11 38.5 12.3 38.6 11.8
2.17 39 12.2 38.9 11.8
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Discussion

• Systematic design procedure leads to one-pass PA
  design
• DC characterized device ? output power estimates
• load-line theory ? approximate range of load
  impedances
• multiple prematching load-pull characterization
  ? accurate and reliable target impedances ZS and
  ZL
• matching network synthesis using EM modeling of
  microstrip lines and lumped element modeling (or
  measurement) ? initial load/source impedances
  close to targets
• pretuning of amplifier halves using calibrated
  break-apart test fixture ? avoids extensive
  postproduction tuning.

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A High-Efficiency High-Frequency Example
First principles assisted by load-pull
measurements for first-pass success - 10-GHz
class-E hybrid PA
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Two-stage class-E PA designed for increased gain,
using bias-pull and same impedances for the 2
stages
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PA alone with varying Vds
PA with closed-loop dynamic bias control
PA with constant Vds
Maintaining high efficiency while output power
varies ? Adaptive amplifier
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High-efficiency signal-adaptive X-band PA, slow
and fast dynamic biasing