Non Redundant Data Cache - PowerPoint PPT Presentation

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Non Redundant Data Cache

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Antonio Gonz lez and Jordi Tubella ... Cacti tool version 3.0 (Static Analysis) Alpha version of SimpleScalar 3.0 (Dynamic Analysis) ... – PowerPoint PPT presentation

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Title: Non Redundant Data Cache


1
Non Redundant Data Cache
ISLPED03, Seoul (Korea) - August 25-27, 2003
  • Carlos Molina, Carles Aliagas and Montse García
  • Universitat Rovira i Virgili Tarragona,
    Spaincmolina,caliagas,mgarciaf_at_etse.urv.es
  • Antonio González and Jordi Tubella
  • Universitat Politècnica de Catalunya Barcelona,
    Spain antonio,jordit_at_ac.upc.es

2
Motivation
  • Caches spend close to 50 of total die area
  • Caches may be responsible for 10 to 20 of total
    power dissipated by a processor

3
Data Value Replication
4
Data Value Replication
5
Objective
  • To reduce die area
  • But mantaining miss ratio
  • Latency
  • Energy consumption

6
Conventional Cache
  • If (Value AValue B) then Value Redundancy

7
Non Redundant Data Cache (1)
Pointer Table
Value Table
8
Data Value Inlining
  • Some values can be represented with a small
    number of bits (Narrow Values)
  • Narrow values can be inlined into pointer area
  • Simple sign extension is applied
  • Benefits
  • enlarges logical capacity of VT
  • reduces latency
  • reduces power dissipation

9
Non Redundant Data Cache (2)
Pointer Table
Value Table
10
Simulation Enviroment
  • Simulators
  • Cacti tool version 3.0 (Static Analysis)
  • Alpha version of SimpleScalar 3.0 (Dynamic
    Analysis)
  • Benchmarks
  • Spec2000
  • Maximum Optimization Level
  • DEC C F77 compilers with -non_shared -O5
  • Statistics Collected for 1 billion instructions
  • Skipping initializations

11
Inlining Performance
12
Die Area
13
Latency
14
Energy Consumption
15
Miss Rate vs Die Area




Miss Ratio




0,1
0,5 1,0 cm2
16
Results
  • Caches ranging from 256 KB to 4 MB

17
Conclusions
  • High degree of value replication is present in
    conventional caches
  • Non redundant data cache
  • Data value inlining
  • Die area reduction
  • Energy consumption reduction
  • Access time reduction
  • Minor miss ratio increasing

18
Non Redundant Data Cache
ISLPED03, Seoul (Korea) - August 25-27, 2003
  • Carlos Molina, Carles Aliagas and Montse García
  • Universitat Rovira i Virgili Tarragona,
    Spaincmolina,caliagas,mgarciaf_at_etse.urv.es
  • Antonio González and Jordi Tubella
  • Universitat Politècnica de Catalunya Barcelona,
    Spain antonio,jordit_at_ac.upc.es
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