Computer Architecture

1
Computer Architecture

• Lecture 2
• Instruction Set Principles

2
Intro to Assembly LanguageMIPS and Intel

• Variables and Constants
• int count 10, I, j, k
• count .word 10
• i .word
• j .word

Count DD 10 i DD ? j DD ?
3
Byte size variables

• char sum 1, total 5
• char uni10 university

sum .byte 1 total .byte 5 uni .byte
u,n, i etc
sum db 1 total db 5 uni db u,n, i
etc
4
Strings

• string str (hello world)

str .asciiz hello world
str db hello world
5
Arrays

• int age100

age .word 0100 100 words initialized to zero
age dw 100 dup(0) 100 words initialized to zero
6
Assignment

• count count 1

la R1, count (load address works in spim)
R1 has address of count lw R2, 0(R1) R2
has the value of count addi R2, R2, 1
Increment sw R2, 0(R1) Save count, if need be
7
Another Example

• i age20 age0 count
• la R3, age R3 has base address of age
• lw R4, 80R3 20 4 80, R4 age20
• lw R5, 0(R3) R5 age0
• add R4, R4, R5
• add R4, R4, R2 R2 had value of count above

8
Control

• count 0
• while (count lt 21)
• agecount agecount1
• count count1
• addi R2, R0, 0 R2 count 0
• lable1
• mul R6, R2, 4 R6 has address of
• countth element
• add R6, R6, R4 R2 count, R4 age
• R6 address of countage
• lw R7, 4(R6) R7 agecount1
• sw R7, 0(r6) agecount R7
• addi R2, R2, 1 Count count 1
• slti R8, R2, 21
• R8 1 if countlt21

9
For Statement

• Total 0
• For (i 0 iltcount i )
• total agei total
• la R1, age R1 has address of count
• lw R2, 0(R1) R2 has the value of count
• addi R5, R0, 0 i 0 R5 is i
• addi R15, R0, 0 total 0 R15 is total
• Xy slt R11,R5,R10 check R5 is R5 lt R10 (R10
  is count)
• be R11, R0, lable loop until
• mul R6, R5, 4 R6 has address of ith element
  of age
• add R6, R6, R4 R4 address of age
• lw R20, 0(R6) R20 agei
• add R15, R15, R20 total total agei
• sw R15, 0(R22) R22 is address of total
• addi R5,R5,1 i i1
• b Xy Unconditional branch
• Lanbl

10
IF then

• If (count max)
• I 5
• else
• I 20
• assume R4 has the value of count, R7 has value
  of MAX and I is R5
• bne R4, R7, else
• addi R5, R0, 5
• b exit
• else addi R5, R0, 20
• exit

11
Classifying Instruction Set Architectures

• Stack
• Register- Register
• Register Memory
• Accumulator
• Memory Memory