ECE 491 Senior Design I

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ECE 491 - Senior Design I

• Lecture 1 - Course Overview
• Fall 2007

Prof. John NestorECE DepartmentLafayette
CollegeEaston, Pennsylvania 18042nestorj_at_lafayet
te.edu
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Todays Outline

• Course Goals
• Administrative Details
• About Design
• Problem Description

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Course Goals

• Learn about the Design Process
• Learn to create and manage large digital designs
• Start from requirements and constraints
• Create design
• Verify design with yours and others
  (interoperability)
• Learn about network protocols and hardware
• Learn to design a simplified network interface

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Key Course Topics

• FPGA-based Design with Verilog HDL
• Data Communications and Networks
• Engineering Design
• The Design Process
• Constraints and Tradeoffs
• Design Verification
• Project Management
• Ethical, Social, Environmental Concerns

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Administrative Details

• Weekly Schedule
• Mon., Wed. Lectures on Verilog/FPGA/Networks
• Tuesday Lab
• Friday Design Discussion, Quiz (sometimes)
• Grading
• Laboratory 30
• Project 20
• Quizzes HW 20
• Final Exam 30
• Warning Labs and projects will require work
  outside scheduled class lab time!

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A Word About Academic Honesty

• Lab groups must work independently on labs
  project unless explicitly stated otherwise
• Its OK to discuss strategies general
  approaches
• Its not OK to share code between groups

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What is Engineering?

• en-gi-neer-ing n 2 the application of science
  and mathematics by which the properties of matter
  and the sources of energy in nature are made
  useful to man in structures, machines, systems,
  and processes -- Websters New Collegiate
  Dictionary
• An engineer is someone who can build for a
  dollar what any damn fool can build for ten --
  Robert A. Heinlein

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Some Characteristics of Design

• Subject to conflicting constraints
• Must generally conform to existing standards
• Requires tradeoffs
• Open-ended
• Iterative
• Usually a team activity
• Analysis verification essential to success
• Sophisticated planning and management needed

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Design Constraints

• Some Common Constraints
• Cost
• Performance
• Environmental
• Manufacturability
• Sustainability
• Social
• Political
• Legal
• Ethical
• Health and safety

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The Design Process

• Usually defined as a sequence of steps
• Several models are used
• Systematic Model of Design e.g., SR
• Colwells model in The Pentium Chronicles
• Software Design Models
• Waterfall Model - SW version of Systematic
  Model
• Rapid Prototyping / Extreme Programming Model

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Example The SR Design Process
Customer needingsolution to a problem

• Requirements analysis
• Creating a detailed problem specification
• Defining what is needed for completion
• System Design
• Determine how problem will be solved
• Create a system specification that describes
  design at a functional level
• Result detailed spec, block diagrams
• Detailed Design
• Create designs for blocks in system design
• Debug and verify individual blocks
• System Integration and Test
• Combine design blocks
• Test complete system

Requirements analysis
System design
Detailed design
System Integration And Test
Properly functioning system
SR Figure 2.4
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Example Colwells Project Phases

• Concept
• Consider needs and ways to address them
• Brainstorm several possible approaches
• Refinement
• Weed out implausible solutions
• Prioritize remaining solutions by estimated
  likelihood of success
• Choose most likely as Plan of Record
• Realization
• Implement prototype of Plan of Record
• Production
• Move prototype to volume production

Concept
Refinement
Realization
Production
SR Figure 2.4
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Design Process Models - Key Points

• A model only approximates what really happens
• Brooks Conceptual Integrity is major challenge
• Non-trivial projects require large teams
• Communication of design to team members is
  essential
• Great designs are created by great designers
• Design errors are inevitable - need to
• Anticipate (and look for) errors
• Avoid the needless creation of errors
• Deal with errors as they occur
• Tools for dealing with errors
• Verification (Simulation, Lab Testing)
• Design Reviews

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How Can We Learn About Design

• By example
• SR text - general theory, project management
• Colwell, The Pentium Chronicles - detailed case
  study
• Colwell At Random columns from IEEE Computer
• Brooks Turing Award Lecture The Design of
  Design
• Costello DAC 06 Lecture Iridium or iPod
• By doing
• This semester design of a simple network
  interface
• Next semester group design of an embedded
  control system

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The Course Project

• Design a local-area network so that each node
  can communicate with other nodes

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The Problem (continued)

• Key Questions
• 1. How do we connect the nodes? (connection
  topology)
• 2. What physical link will we use?
• 3. How will we transmit data? (data transmission)
• 4. How will we implement the system? (design
  approach)

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Connection Topology - 1/5

• Point-to-Point
• Connections are private
• Circuit-switched
• Example Phone Exchange

Connection Matrix (Crossbar Switch)
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Connection Topology - 2/5

• Star Topology
• Circuit-switched

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Connection Topology - 3/5

• Single Bus
• Packet switched
• Each station has accessto all messages
• How do stations knowwhen to send? (arbitration)
• What happens when two stationssend at same time?
  (collision)
• Example Ethernet

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Connection Topology - 4/5

• Token Ring
• Packet switched
• Arbitration by token passing
• Each station propagatesmessage to destination
• Each station has access to all messages
• No collision possible (why?)

(src)
(dst)
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Connection Topology - 5/5

• Token Bus
• Packet switched
• Single Bus
• Arbitration by token passing
• Each station propagatesmessage to destination
• Each station has access to all messages
• No collision possible (why?)

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Physical Link - 1/2

• Options for the physical connection
• Transmission lines
• Twisted pair
• Coaxial
• Optical fiber
• Wireless
• Infrared
• Microwave

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Physical Link - 2/2

• Options for signaling
• Pulses
• Voltage
• Single-Ended / Point-to-Point RS-232
• Differential / Multidrop RS-485
• Current Loop
• Optical
• RF / Wireless
• Modulation
• Direct
• Frequency-shift keying (FSK)
• 1 cos(2p 1000 t)
• 0 cos(2p 2000 t)

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Data Transmission

• Options for sending data
• Parallel - transmit multiple bits simultaneously
• Serial - transmit one bit at a time

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Design Project - Implementation Options

• Use existing hardware (e.g., PC ethernet card)
• TTL Packages on a PCB or Breadboard
• Microcontroller plus serial interface
• Programmable Logic Devices
• PALs / GALs
• FPGAs
• Application-Specific Integrated Circuit (ASIC)
• Custom Integrated Circuit

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Our Design Approach - Block Diagram

• FPGA-based design using Xilinx Spartan3 boards

Spartan3 Board
XC2S300 FPGA
NetworkInterface
Breadboard
RS-485 Multidrop Twisted Pair
RS-232 Buffers
Test Interface
Buffer Memory(Block RAM)
PC
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Our Network (Ethernet)
Station 1 S3 Board
Station 2 S3 Board
Station 3 S3 Board
Station 4 S3 Board
Station 5 S3 Board
Station 6 S3 Board
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Project Summary

• Each lab group will design a node in a LAN
• Network Design Simplified Ethernet following the
  Metcalfe Boggs paper
• Grading Criteria
• For a C project grade, must demonstrate
• Communication between two copies of your node
• Communication with nodes designed by other groups
• For an A project grade, must also demonstrate
• Working CRC error detection
• Working collision detection and backoff

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Coming Up

• FPGA Review
• Spartan Board Quick Intro
• Digital Design with Verilog
• Combinational Design
• Sequential Design