Title: Fast Fourier Transform Components
1Fast Fourier Transform Components 4 point FFT
- Final Design Review Dec. 12
- Team Leader Luo Yifei
- Team Member Tomasz Jankowski
- Course ECE 715/815 -VLSI
- Partners Mosis, GigaIC
2Presentation Agenda
Research
Methodology Specification
Design
Time Management Summary Presentation
3Agenda
Project Definition
Design Tool Methodology
FFT Theory
Components
Design Process
Project Timetable
Summary
4Agenda
Project Definition
Design Tool Methodology
FFT Theory
Components
Design Process
Project Timetable
Summary
5Project Definition
- Description
- The purpose of the project is to develop a
library of components for a 4 point FFT algorithm - Specifications
- suggested clock speed 100 MHz (note if the
speed of 100 MHz can not be achieved in AMI05
technology then a lower frequency is acceptable) - algorithm radix-4
- arithmetic 16 bit fixed point, 2s complement
- complex arithmetic operations should be divided
into smaller tasks (pipelining) if the assumed
target frequency could not be achieved otherwise - All control and status signals should follow the
same standard - All components should have a clock input (CLK),
reset (RST) - Arithmetic operators should contain a status line
(OVFL) indicating whether an overflow has
occurred - The cooperation among the design teams is
encouraged!!!
6Fingerprint Recognition Components
7Fingerprint Recognition Components
8Agenda
Project Definition
Design Tool Methodology
FFT Theory
Components
Design Process
Project Timetable
Summary
9Methodology
ASIC Implementation
Step 1 Preparation
Step 2 Schematic
Step 3 Layout
Time Schedule Task Management Research Decision
Schematics Simulation Decision
Layout Padding Errors? -) Decision
10Design tools and Methodology
- Gajski diagram
- CAD Tools
- AMI 0.5 MOSIS
11Agenda
Project Definition
Design Tool Methodology
FFT Theory
Components
Design Process
Project Timetable
Summary
12FFT - theory
Sixteen-point radix-4 primes-to-a-power diagram
13FFT Complexity
- FFT 16-point radix 4 logic
14FFT Complexity
- Points 4 -gt 16 - to complex in one chip gt 4
point (as a part of 16-point FFT) - 16bit -144 Adds16FA5Gates4tranzistors 46080
transistors!!! - Tiny Chip space for 0.50 micron AMIS 21 mm x 21
mm - Pins 40 -gt 16 inputs, 16 outputs, 2 Vdd, 2
GND, 36 - 3 control Reset, CLK, CTL
- Bits -gt 4R4I 8bits per point
- Registers 2x32 bit for input and output with
control (Real or Imaginary)
15Agenda
Project Definition
Design Tool Methodology
FFT Theory
Components
Design Process
Project Timetable
Summary
16Components
- FFT 4-point Complex Multiply
17Agenda
Project Definition
Design Tool Methodology
FFT Theory
Components
Design Process
Project Timetable
Summary
18Project Schematics
- Design components
- 4 bit Adder
- 4 bit Subtractor
- 16 bit Register
- 16 bit Output
- 4 bit Adder
19Project Schematics
20Project Schematics
21Project Schematics
22Project Schematics
23Simulation Waveforms
24Simulation Waveforms
25Simulation Waveforms
26Simulation Waveforms
27Simulation Waveforms
28Simulation Waveforms
- 4 Point FFT with all Re1 and Im2
29Simulation Waveforms
30Layout
31Agenda
Project Definition
Design Tool Methodology
FFT Theory
Components
Design Process
Project Timetable
Summary
32Project plan
Agenda - project preparation - project
schematics simulation - layout, padding
simulations - report
33Agenda
Project Definition
Design Tool Methodology
FFT Theory
Components
Design Process
Project Timetable
Summary
34Next Steps
Documentation
Fabrication
Testing
35References
1 W. Smith, J. Smith Handbook of Real-Time Fast
Fourier Transforms, JOHN WILEY SONS, 1995. 2
N. Weste, D. Harris CMOS VLSI DESIGN, A Circuits
and System Perspective, Pearson Education, 3nd
edition, 2005. 3 D. Clein, CMOS IC LAYOUT
Concepts, Methodologies, and Tools,
Butterworth-Heinemann, 2000. 4 Weste, Neil
H.E. CMOS VLSI Design, Addison Wesley, 3rd
edition, 2005. 5 M. M. Morris, C. R. Kime
Logic and Computer Design Fundamentals, Pearson
Education, 3nd edition updated, 2004.
36Special Thanks
37More info, links ?