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SNS Beam Loss Monitor Electronics Final Design Review

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Low-end resolution limited by noise and BW, upper end by detector and/or electronics saturation. ... Electronics Dynamic Range. Fast Response for Beam Abort ... – PowerPoint PPT presentation

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Title: SNS Beam Loss Monitor Electronics Final Design Review


1
SNS Beam Loss Monitor ElectronicsFinal Design
Review
  • D. Gassner, R. Witkover
  • Brookhaven National Laboratory

2
SNS BLM Electronics Outline
  • Requirements
  • Dose Rate Estimates
  • Gain and Threshold Control
  • Dynamic Range
  • System Block Diagram
  • Cable interface
  • Analog Circuit Schematic
  • Front end Stage
  • Fast Loss Integrator (MPS Trip) Stage
  • Viewing Stage
  • 1 W/m stage
  • Thermal Drift
  • VME Digitizers
  • Data Acquisition
  • HV Bias
  • Summary

3
BLM System Electronics Requirements
  • Provide measurements of loss for tuning
  • Protect the machine from high activation due to
    slow, low-level losses
  • (1W/m criteria)
  • Protect the machine from radiation damage due to
    fast high-level losses
  • MPS Input (Beam Permit/Inhibit Link)
  • Not for personnel protection.

4
Dose Rate Estimates
  • Slow Loss 1 W/m criteria
  • Corresponds to 10- 4 loss distributed around
    248 m Ring.
  • Beam-off activation approximately 100 mrad/hr at
    1 ft.
  • Rule of thumb Multiply by 1000 to get beam-on
    dose rate (100R/hr).
  • Same as 0.5 R/sec during the 1 ms SNS pulse.
  • Need to resolve 2 decades below, or 1 of 1 W/m.
  • What is maximum high-end loss?
  • 1 local loss (of 2 MW) 20 kW requested.
  • Pre-integration to extend dynamic range.
  • Total range is equivalent to 21-bits sign
  • Low-end resolution limited by noise and BW, upper
    end by detector and/or electronics saturation.

5
Required Gain and Threshold Control
  • Programmable Gain (local remote)
  • Beam intensities
  • Linac and HEBT range 15-38 mA
  • Ring increases 103 during macro-pulse
  • RTBT can vary 103 between single turn, full
    intensity
  • Detector shielding by beam line components
  • Beam energy dependence
  • Programmable loss limit thresholds
  • Individual channels
  • Separate thresholds for Fast and 1 W/m losses
  • Trip outputs can be masked through MPS for studies


6
Electronics Dynamic Range
  • Fast Response for Beam Abort
  • For 10us rise time, BW would be 35 kHz. (550 pA
    noise scaled from RHIC)
  • This limits resolution to 30 Rad/hr.
  • Intention is to observe large fast losses 106
    Rad/hr
  • Signal Upper Limit
  • 1 of 2MW, in Linac and HEBT, uniformly over
    pulse 644uA
  • Lost fast in one place (RTBT) 644 nC (very
    large)
  • Lower Limit
  • 1 of 1W/m 324 pA
  • Total dynamic range of 126dB (324pA 644uA)
  • Need separate signal paths for Fast and Slow
    losses.

7
System Block Diagram
8
BLM-Cable Interface
  • In order to balance rise time due to signal cable
    length variations, a BLM-Cable interface panel
    will be included which will hold capacitors at
    the transition from the coax to mass termination
    connectors. Example
  • Belden 9054 is 16 pf/foot, runs will vary from 75
    to 300 feet, yielding 1200 4800 pF.
  • 470 Ohm AFE input R, rise times will vary from
    1.2 to 5us (assume 2.2 X RC rise time)
  • We can extend the dynamic range for RTBT fast
    loss signals by pre-integrating the signal by
    choosing input caps for a 50-100 usec time
    constant. This would allow us to get to several
    times 0.1 single point loss without saturating
    the 1 W/m Viewing stage electronics.
  • NOTE Belden 9054 is a low Tribo-electric cable
    which significantly reduces noise due to
    friction. It is essential when measuring signals
    in the nA or lower region.

9
Analog Front End
80kHz
80kHz
1.5kHz
1.5kHz
10
Front End Amplifier Stage
  • Trans-impedance amplifier
  • Burr-Brown OPA627BP
  • low offset voltage, Vos 100 µV max (un-trimmed)
  • Drift 0.8uV/0C, max
  • Bias current, Ib 1 pA
  • GBW 16 MHz. Open loop gain 120dB.
  • Selectable gain settings
  • Normal Linac 62k Ohm
  • Normal Ring 6.2k Ohm
  • High Controlled loss 1k Ohm
  • Noise voltage gain is set by the resistors Rf
    and Ri, 6200/470 13.2, but the signal is only
    set by Rf, (IC ideal current source). RHIC noise
    10 pA for 10 Hz BW. Using a 100 kSa/S ADC, BW
    will be limited to 50 kHz. Scaling between these
    cases gives an equivalent noise current of 0.71
    nA and an output noise voltage of 4.36 µV.
    Johnson Amp noise 4.1 µV.
  • Thermal Drift calculated worst case is 100 µV,
    actual data (better) shown later.
  • Trim Pot
  • Protection Diodes

11
Analog Front End
12
Fast Loss Integrator (for MPS)
  • Experience at LANSCE has shown that a beam
    inhibit signal should be based on integrated dose
    rather than dose rate. Hardware damage is
    normally due to amount of energy rather than rate
    of energy deposited.
  • An integrator will be used to provide a signal
    to a comparator to generate a signal for the MPS
    when the programmable reference is exceeded.
  • Response time 10 us (input RC, FE, this stage
    response.)
  • Leaky Integrator vs.
  • Simple
  • Adequate ?
  • Non-linear
  • Residual offset
  • Gated Integrator
  • More complex
  • Gating Reset
  • Charge injection
  • Precise

16.6 ms
Circuit components values related to MPS
Comparator range (unknown).
13
Analog Front End
80kHz
80kHz
14
Viewing Stage
  • Features
  • Isolation to drive 100kS/s digitizer
  • Remote gain setting X1, X10 and gain readback.
  • Change viewing gain without changing MPS trip
    threshold.
  • Noise Calculated 110 µV (trim pot this stage. With trim pot, better 20 µV.
  • Drift See upcoming plot
  • Saturation problem in RTBT, solved by
  • Added capacitors in Cable Interface, 50-100us
    time constant
  • Jumper selectable AFE signal routing
  • Linac Ring routed directly from first stage.
  • RTBT routed through integrator.
  • Should yield several times the 0.1 single point
    loss without saturating the electronics.

15
Viewing Stage Data Acquisition
  • Data Acquired
  • Baseline (1 msec) BLM signal (1 msec ion
    collection time)
  • Digitizer 16 bits (incl sign), 100 kSa/s
  • 2 bytes/sample, 500 bytes/SNS cycle
  • /-5 V, LSB 152.6 µV
  • Only selected BLMs send full data (10 max for
    entire system).
  • Sum of losses per BLM, per macro-pulse, sent once
    per second.
  • Input to waterfall type display.
  • 1000 point FIFO history at the console level for
    use in the event of an abort.

16
Analog Front End
80kHz
80kHz
1.5kHz
1.5kHz
17
1 W/m Stage
  • Philosophy
  • Reduce noise by reducing BW.
  • 1kHz allows enough settling time so digitizer can
    acquire baseline.
  • Reduce amplitude of fast loss spikes so we dont
    saturate.
  • Gain added ( X 10) so we can use 16-bit ADC
    rather than 24 bit ( see slide )
  • 1 W/m loss during the cycle (32.4nA X 6.2k X 10)
    will yield 2mV.
  • 1 of 1W/m 20uV
  • Trim Pot
  • Data Baseline (1 msec) Beam On (1 msec)
    Residual signal (1 msec)
  • Digitizer
  • Slow loss viewing 16 bits (incl sign), 100
    kSa/s
  • 2 bytes/sample, 600 bytes/SNS cycle
  • /-5 V, LSB 152.6 µV
  • Data accumulated over 10 second or longer
    interval
  • Processed to compare against a 1 W/m reference
    (alarm) in IOC.
  • Pre-averaged low-level data will be available as
    a waterfall, or a strip chart display.

18
Thermal Drift
1 LSB
19
SNS BLM Digitizers
Simulated slow loss signal measured by a 16 and a
24 bit digitizers (Yongbin Leng)
1 W/m loss generates 32.4nA, through 6.2k
200uV, for 1 ms pulse. Times 10 gain. 1 of
1W/m yields 2 x 10-8 V.S.
1 1W/m
600 pulses 10 seconds
20
VME Implementation
Non-VME, Linear power supplies
21
Data Acquisition and Control
  • Controls Interface
  • Readback front end gain jumper setting
  • Set Readback Viewing Stage Gain (X1, X10)
  • Timing for Integrator (MPS) gating
  • Set loss threshold, fast loss (trip), slow loss
    (alarm)
  • Digitized loss data (fast and slow)
  • Gain and calibration data folded into resolved
    data.
  • Set and readback of High Voltage, On/Off bits
  • System test

22
HV Bias
  • ISEG HV Bias Supply
  • VME High Voltage Power Supplies in 2 slot width
  • 1 channel and 2 channel versions in same
    dimensions
  • LCD display for voltage or current
  • variable rate of change of output voltage
  • switched polarity
  • integrated protection and control circuits
  • output overload and short circuit protected
  • SHV connector on front side
  • Full control via VMEbus
  • EPICs drivers
  • 1.2k/channel
  • Model VHQ 204L, 0-4kV, 1mA

23
SNS BLM System - Summary
  • BLM Electronics
  • Provide loss measurements for tuning. Three
    local gain ranges.
  • Low level signals (1W/m)
  • Expected low-end signals within the range
    proposed system.
  • Bandwidth limit 1kHz.
  • Process data over 10 second interval.
  • Goal 1 of 1W/m.
  • Higher level signals (larger fast losses)
  • Wideband (50kHz) viewing.
  • Additional remote gain control.
  • Fast RTBT loss signals pre-integrated to extend
    dynamic range.
  • Machine Protection (Integrated loss)
  • 10 µsec response, programmable thresholds and
    masks.

24
Back-Up Slides
  • Rack Layout
  • Analog Front end (Leaky integrator)

25
Rack Layout
  • Location Ch FBLM Crates Note
  • DTL_DiagCab401 5 1
  • CCL_DiagCab301 12 1
  • CCL_DiagCab302 12 1
  • SCL_DiagHB13Cab01 29 1
  • SCL_DiagHB1Cab02 30 1
  • HEBT_DiagCab07 40 3 2 1
  • Ring_DiagCab05 55 12 2 2
  • Ring_DiagCab06 44 0 2 3
  • RTBT_DiagCab04 28 3 1 4
  • Note 1 12 HEBT ch located in Ring racks
  • Note 2 Includes HEBT ch beyond ground break
  • Note 3Includes 12 ch from RTBT before ground
    beak
  • Note 4 12 RTBT ch located in Ring racks

26
Analog Front End (LI)
36Hz
80kHz
80kHz
1.5kHz
1.5kHz
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