PROJECT TEAM :

1
LOW POWER RECONFIGURABLE CORE
FOR 3D GRAPHICS SHADING AND TEXTURE MAPPING
PROJECT TEAM
ARUNACHALAM RAMANATHAN JEEVAN CHITTAM KRISHNA
PRASAD NIRUPAMA RAMASWAMY
PROPOSAL
2
OBJECTIVES

• Design a Reconfigurable Core for 3D Graphics
  Shading at RTL Level.
• Design a Reconfigurable Core for Texture
  Mapping/Filtering at RTL Level
• Simulate the Interface between two Cores

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TYPICAL 3D-GRAPHICS PIPELINE
3D LABS AGP CARD
Floating Point
Fixed Point
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3D GRAPHICS CORES
Memory Data From CPU
aSOC Interconnect Block
ANSM / Jian
From Geometric Engine
Reconfigurable Texture Mapping Core (with
Texture Memory)
Reconfigurable Shading Core
aSOC Interconnect Block
To Blending / Display Engine
ANSM / Jian
Arun / Rupa Jeuh
Krishna / Jeevan Jeuh
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GRAPHICS SHADING BACKGROUND
The Lighting Equation for Multiple Light
Sources I KaIa ?I1 to n Ili Kd (
N?. Li?) Ks(N?. H?)s Ambient
Diffusion Specular I (R,G,B)
Pixel Lighting Value Ka,, Kd , Ks Reflection
coefficients Ili Intensity of ith Light
Source N? Unit normal Surface Vector H?
Half Way Unit Vector V? Unit vector directed
towards viewer Li? Unit vector directed
towards the ith Light source
Direction of Reflection
R ?
H ?
N ?
Li?
V ?
Specular Reflection
N1, I1
N2, I2
N3, I3
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I (R,G,B) Ka Ia (0 lt Ka lt1)
I (R,G,B) Ili ( Kd (Nv.Lv)) Ili 1 to n
(0 lt Kd lt1)
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Ambient, Diffused Lighting
Gouraud
Independent of Viewer Position
Ambient, Diffused, Specular (Phong)
Depends on Viewer Position
Accounts for Shadows, Reflection, Object
Shininess etc
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RECONFIGURABLE SHADING CORE
Phong/ Fast Phong Shading
Clock, Control
Constrains/Parameters From Application
Algorithm Architecture Controller
Intensity (R, G, B)
Gouraud Shading
Clock, Control
Vectors From Geometric Engine

• Reconfiguration
• Gouraud / Phong
• Phong / Fast Phong ( Cordic Algorithm)

• Low Power Achieved at Architecture Level
• Clock Frequency Variation
• Disabling Unused Blocks

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Gouraud/Phong Reconfiguration
N
N
Cordic Algorithm (Normal Vector Interpolation)
P
G
MUX
G / P
Intensity Interpolation
Intensity Computation
Ia, Ili, S Ka, Kd, Ks
G
P
MUX
G / P
X,Y (To Texture Core)
FIFO (Depth No. of Pixels/Triangle) (Width
R,G,B,X,Y)
I (R,G,B) (To Blending Engine)
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Gouraud Shading Internal Architecture
X,Y
N,L
Kd,Ka
Ia,Ili
Xi,Yi
Intensity Calculator (1)
Edge Interpolator (with LUT)
Intensity Selection Logic
FIFO for Edge Intensities
I (R,G,B)
Edge Interpolator (with LUT)
Intensity Selection Logic
Intensity Buffer (3)
FIFO Empty To Geometric Engine
Scan Line Interpolator (with LUT)
FIFO (Depth Pixels/Triangle) (Width
R,G,B,X,Y Bits) (2)
FIFO Full I (R,G,B) To Display Engine
N1, I1
N2, I2
X,Y To Texture Mapping Core
N3, I3
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Intensity computation (Gouraud / Phong) I
KaIa ?I1 to n Ili Kd ( N?.Li?)
Ks(N?.Hs?)s
Hir?
Lib?
Lig?
Hig?
Nb?
Nr?
Lir?
Nb?
Ng?
Hib?
s
Nr?
Ng?
MUL
MUL
MUL
MUL
MUL
MUL
Wallace Adder
Wallace Adder
LUT
N.Li
(N. Hi)
Ka
Ia
S 1

Kd
MUL
S 2
Address Generation Logic
MUL
S 4
Kd(N. Li)
- -
ADD
n
- -
MUX
(N. Hi)s
S 128
Ks(N. Hi)s
MUL
S 256
MUX
G/P
MUX
Ili
Ks
MUL
Li (Lir , Lig , Lib )
Ili (Ilir , Ilig , Ilib )
ADD
N (Nr , Ng , Nb )
Hi (Hir , Hig , Hib )
I (R,G,B)
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TEXTURE MAPPING BACKGROUND

• Mapping 2D Textures / Patterns on to 3D Objects
• Adding Realism to computer generated 3D Images

24 Bit Bitmap (RGB) From Memory
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Texture Mapping Examples
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Types of Filtering
(u-uf , v-vf)
(u1-uf , v-vf)
Weighting factors
Texel 0
Texel 1

Texel 0 (W0) (1- uf) (1- vf) Texel 1 (W1)
(uf)(1-vf) Texel 2 (W2) uf vf Texel 3 (W3)
(1-uf) vf
(u,v)
Texel 2
(u-uf, v1-vf)
( u1-uf , v1-vf)
Texel 3
Point Filtering ( Nearest neighbor)
Bilinear Filtering
I(pixel) I (Texel) with highest W.
I(x,y) I0 W0 I1 W1 I2
W2 I3 W3
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TRILINEAR FILTERING
Level n
MIP-MAPPING
I (x,y) (1-Lf). I (Level n-1) Lf . I (Level n)
(U,V)
Lf Fractional Part of Level
x, y Screen Pixel Co-ordinates corresponding to
Texel U,V
Level (n 1)
Bilinear Filtering
Trilinear Filtering
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RECONFIGURABLE TEXTURE MAPPING CORE
Interleaved Texture Memory Blocks
Memory Data From CPU
Point Filtering
Reconfiguration Control From Application
Controller (Filtering Algorithm Selection)
I (R,G,B)
Bilinear Filtering
X, Y From Shading Core
Trilinear Filtering
U, V From Geometric Engine
U, V Texture Map Co-ordinates
X , Y Screen Pixel Co-ordinates
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Texture Core Reconfiguration

• Point Sampling For Low quality Images
• Bi-linear Filtering High quality Images
• Tri-linear Filtering High Quality Images with
  Perspective Effect (Mip mapping)

Low Power Operation (Architecture Level)

• Disabling Unused Memory and Filtering Blocks
• Configuring Clock for a particular throughput

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Memory Interleaving
1
0
1
0
4
5
3
2
3
2
0
1
1
0
1
0
7
6
3
2
3
2
Level 0
Level 1
2
3
Assignment of Texels To Memory Banks
Level 2
0, 1 .. 7--- Memory Blocks
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Texture Mapping Basic Block
High Speed Texture Memory Block
( u,v)
(
Address Generator
Memory Fetch Unit
Multiply Accumulate Unit
I(x,y)
(x,y)
To Blending Unit
Weight Generator
Fetch Accumulate Unit (FAU)
u, v Texture / Bit Map Coordinates x, y
Screen Pixel Coordinates
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Bilinear Interpolation
Memory Block 1
Memory Block 2
Memory Block 3
Memory Block 4
(u,v)
I(x,y)
FAU for texel 2
FAU for texel 1
FAU for texel 3
FAU for texel 4
To Blending Unit
(x,y)
FAU Fetch Accumulate Unit
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TRI-LINEAR INTERPOLATION
Level n
Level (Lf)
Bilinear block for Level n computation
From Geometric Engine
I(n)
(u,v)
I(x,y)
MAC
To Blending Engine
Level n -1
I(n-1)
Bilinear block for Level n-1 computation
I(x,y) I(n)( 1-Lf) I(n-1)Lf
Lf Fractional Part of Level
MAC - Multiply Accumulate Unit
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DELIVERABLES

• Synthesizable RTL Model for the two cores -
  Shading/Texture Mapping
• Individual simulation results of the two cores
• Results of simulation of the integrated cores

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INTERACTION
Prof. Wayne Burleson
3D Graphics
Interconnect Group
Jeongseon Euh
3D Graphics Core
Reconfigurable Shading Core (Rupa/Arun)
Reconfigurable Texture Mapping Core (Krishna/Jeeva
n)
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TENTATIVE SCHEDULE
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REFERENCES

• Jeongseon Euh and Wayne Burleson ,Exploiting
  Content Variation and Power-Aware 3 D Graphics
  Rendering
• J.Liang, S. Swaminathan, and R.Tessier , aSOCA
  Scalable, Single chip communications
  architecture
• Ray Andraka,Survey of CORDIC algorithms for FPGA
  based computers
• B.Phong, Illumination of for computer generated
  pictures
• H.Gouraud, Continuous Shading of curved
  surfaces
• B.Shih, Y.Yeh, and C.Lee , An Area Efficient
  Architecture for 3D Graphics Shading
• Richard F. Lyon, Phong Shading Reformulation for
  Hardware Renderer Simplification
• J. Foley, Computer graphics Principles
  Practice
• 3D Labs Inc. http//www.3Dlabs.com/
• Intergraph Computer Systems, Texture Mapping in
  the RealiZm II and Intense 3D pro 3D Graphics
  Families
• 
  

Thank You