Toggle Equivalence Preserving (TEP) Logic Optimization

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Toggle Equivalence Preserving (TEP) Logic
Optimization
Eugene Goldberg (Cadence, USA), Kanupriya Gulati
(Texas AM University, USA) Sunil Khatri (Texas
AM University, USA)
DSD 2007, Lübeck, Germany
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Summary

• Logic Synthesis Preserving Toggle Equivalence
  (LS_TE)
• example
• advantages
• TEP procedure
• problem formulation
• novel convergence scheme
• example
• Some experimental results and conclusion

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Example of LS_TE
square(x) lt 100 ? abs(x) lt 10
z
z
N2
y lt 100
y lt 10
N2
y2n

y1
yn

y1
TEP procedure
N1
N1
square(x)
abs(x)
TEP procedure

Circuit N

Circuit N
x1
xn
x1
xn
Subcircuit N1 is toggle equivalent to N1.
Subcircuit N2 is toggle equivalent to N2 (under
allowable input assignments).
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General formulation of LS_TE
Given a single-output combinational circuit N
partitioned into subcircuits N1,..,Nk, LS_TE is
to produce a new circuit N replace each Ni
with an optimized toggle equivalent Ni.
Multi-output subcircuits Ni and Ni are toggle
equivalent if Ni(p? ) ? Ni(p? ) ? Ni(p? ) ?
Ni (p? ).
Single-output subcircuits Toggle equivalence ?
functional equivalence (modulo negation).
Definition of toggle equivalence can be extended
to the case when Ni and Ni have different input
variables but there is a one-to-one mapping
between allowed input assignments.
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Advantages of LS_TE (escaping local minima)
z
z
R2
N2
y lt 100
Re-encoder
y1
y2n
z
z

N2
N2
y lt 10
y lt 100
R1
Re-encoder
y1
yn

y1
y2n
y1
yn


abs(x)
abs(x)
N1
square(x)
N1
N1



x1
xn
x1
xn
x1
xn
Even if Ni lt Ni, it maybe the case that
Ni Ri gt Ni
In terms of equivalent transformations, LS_TE
may temporarily increase the circuit size.
(IWLS-2007)
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Advantages of LS_TE (larger set of acceptable
synthesis transformations)
Usually a transformation that breaks functional
equivalence of a chosen surrounding subcircuit is
rejected.
In LS_TE, one can make transfor-mations that
preserve only TE of a surrounding subcircuit
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Summary

• Logic Synthesis Preserving Toggle Equivalence
• example
• advantages
• TEP procedure
• problem formulation
• novel convergence scheme
• example
• Some experimental results and conclusion

8
TEP procedure (incremental)
Let M denote a subcircuit Ni of N.
Problem Given a multi-output circuit M, build an
(optimized) toggle equivalent circuit M.
In case M and M have identical input variables,
this problem can be solved incrementally.
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TEP procedure (non-incremental)
In the general case M and M have different
input variables that are related by so-called
correlation function CF(x1,..,xn,x1,,xd).
Correlation function specifies a one-to-one
mapping between allowable input assignments.
If inputs of M and future circuit M are
different , one can not reuse the structure of M.

z1
zp

z1
zm
M
M


x1
xd
x1
xn
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Toggle implication
M, M are multi-output circuits
Toggle implication (denoted M ? M ) M(p? ) ?
M(p? ) ? M(p? ) ? M(p? ).
M and M are toggle equivalent iff
M ? M and M ? M
Strict toggle implication (denoted M lt M ) if M
? M is true, but M ? M is not
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Checking toggle implication
M, M are copies,
M, M are copies,

z1
zm
M
M ? M holds iff S(M,M) is unsatisfiable.

x1
xn
S(M,M) SAT(M) ? SAT(M) ?
SAT(M) ? SAT(M) ? (Z ? Z) ?
(Z Z)

z1
zp

z1
zm
M
M
Each assignment satisfying S(M,M) specifies a
toggle of M that is not in M.


x1
xn
x1
xn
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Novel Convergence Scheme
A TEP procedure, in general, can not re-use the
structure of M. Then we need to solve the
convergence problem.
Usually, the convergence problem is avoided by
making functionally equivalent, incremental
transformations.
Alternatively, the convergence problem is solved
by severely restricting the class of
implementations we consider. In SIS, it is
sums-of-products. In BDDs, it is networks of
multiplexers.
We build a sequence of circuits M1,,Md such that
a) M ? Mi and b) Mi lt Mi-1 This sequence
converges to a circuit M such that a) M ? M and
b) M ? M.
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Example
M1 identity // so M ? M1 repeat M?
rem_toggles(Mi) Mi1 add_toggles(M? )
rem_red_outputs(Mi1) until (Mi1 ? M)
Target circuit M implements x1 ? x2
M1
Init. circuit
First iter.
Second iter.
M?
rem_toggles
rem_toggles
M2
add_toggles
M3
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More about removing and adding toggles
Let A be the set of all toggles of Mi that are
not in M.
When removing toggles we are free to choose any
non-empty subset of A.
Let B be the set of all toggles of M that has to
be re-introduced into Mi
We have to reintroduce all the toggles of B back
to Mi.
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Experimental results (Using TEP procedure for
simplification of expressions)
Expr. bits scr. rugged scr. rugged collapse, scr. rugged collapse, scr. rugged TEP TEP BDD
Expr. bits time (s) gat. time (s) gat. time (s) gat. time (s)
x2 lt C 16 94 1,808 2,151 52 54 46 0.9
x2 lt C 27 35 7,037 gt10h - 282 50 Mem
x2 lt C 30 56 8,681 gt10h - 525 57 Mem
C1?xltC2 38 37 6,709 gt10h - 497 58 Mem
C1?xltC2 50 136 10,483 gt10h - 2,183 66 Mem
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Experimental results(Using TEP procedure to
optimize small single output circuits)
Circuits inputs scr.rugged ? CT scr.rugged ? CT TEP ? CT TEP ? CT
Circuits inputs area delay(ps) area delay(ps)
pm1(10) 8 183.0 120 156.8 109
square5(1) 5 250.9 118 156.8 105
x4(34) 8 224.7 124 172.5 142
5xp1(5) 4 308.4 163 230.0 164
sqrt8ml(3) 8 3183.4 652 2300.0 584
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Experimental results(TEP procedure in the
context of LS_TE)
stage 1 stage 2 script.rugged script.rugged TEP TEP
stage 1 stage 2 gates time (s) gates time (s)
rd84 5xp1(5) 138 0.8 53 62
rd84 alu2(5) 78 0.5 47 62
rd84 b12(3) 101 0.6 37 62
square5 alu4(1) 43 0.1 23 3.4
square5 b12(2) 42 0.1 20 2.7
square5 c8(11) 28 0.1 17 2.2
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Conclusions

• Our TEP procedure can be used for developing new
  structure-agnostic synthesis algorithms
• Besides, TEP procedure enables a powerful method
  of logic synthesis (LS_TE).
• LS_TE suggests a way to address local minimum
  entrapment problem
• LS_TE allows a more general set of synthesis
  transformation (one can accept a transformation
  that preserves only toggle equivalence)